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path: root/drivers/gpu/drm/i915/gt/intel_engine_regs.h
AgeCommit message (Expand)Author
2023-11-07drm/i915/xelpmp: Add Wa_16021867713Gustavo Sousa
2023-10-31drm/i915: Set copy engine arbitration for Wa_16018031267 / Wa_16018063123Jonathan Cavitt
2023-10-31drm/i915: Add WABB blit for Wa_16018031267 / Wa_16018063123Andrzej Hajda
2023-09-19drm/i915/lrc: User PXP contexts requires runalone bit in lrcAlan Previn
2023-01-18drm/i915: Move/adjust register definitions related to Wa_22011450934Matt Roper
2022-10-27drm/i915/perf: Fix noa wait predication for DG2Umesh Nerlige Ramappa
2022-09-14drm/i915/gt: Explicitly clear BB_OFFSET for new contextsChris Wilson
2022-06-02drm/i915: Add extra registers to GPU error dumpStuart Summers
2022-05-31drm/i915/pvc: Add initial PVC workaroundsStuart Summers
2022-05-02drm/i915/gt: Clear SET_PREDICATE_RESULT prior to executing the ringChris Wilson
2022-05-02drm/i915/selftests: Skip poisoning SET_PREDICATE_RESULT on dg2Chris Wilson
2022-04-19drm/i915: Add Wa_22011802037 force cs haltTilak Tangudu
2022-02-16drm/i915/gt: Use parameterized RING_MI_MODEMatt Roper
2022-02-16drm/i915/gt: Move SFC lock bits to intel_engine_regs.hMatt Roper
2022-02-02drm/i915: Parameterize MI_PREDICATE registersMatt Roper
2022-02-02drm/i915: Parameterize R_PWR_CLK_STATE register definitionMatt Roper
2022-01-11drm/i915/gt: Move engine registers to their own headerMatt Roper
generated by cgit v1.2.1 (git 2.18.0) at 2026-01-24 02:06:21 +0000