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| author | d0x471b <0x471@protonmail.com> | 2022-12-31 03:45:30 +0300 |
|---|---|---|
| committer | d0x471b <0x471@protonmail.com> | 2022-12-31 03:45:30 +0300 |
| commit | 0f1d7d51de1baa21256fdb7ddafe54aab66172f7 (patch) | |
| tree | 30373f9b64ba6301096f26cdade55ebac4f5e59f /cli/vendor/golang.org/x/sys/cpu/cpu_arm64.s | |
| parent | 517ad8d13a6b23328927154226575605be70669f (diff) | |
Diffstat (limited to 'cli/vendor/golang.org/x/sys/cpu/cpu_arm64.s')
| -rw-r--r-- | cli/vendor/golang.org/x/sys/cpu/cpu_arm64.s | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/cli/vendor/golang.org/x/sys/cpu/cpu_arm64.s b/cli/vendor/golang.org/x/sys/cpu/cpu_arm64.s new file mode 100644 index 0000000..c61f95a --- /dev/null +++ b/cli/vendor/golang.org/x/sys/cpu/cpu_arm64.s @@ -0,0 +1,32 @@ +// Copyright 2019 The Go Authors. All rights reserved. +// Use of this source code is governed by a BSD-style +// license that can be found in the LICENSE file. + +//go:build gc +// +build gc + +#include "textflag.h" + +// func getisar0() uint64 +TEXT ·getisar0(SB),NOSPLIT,$0-8 + // get Instruction Set Attributes 0 into x0 + // mrs x0, ID_AA64ISAR0_EL1 = d5380600 + WORD $0xd5380600 + MOVD R0, ret+0(FP) + RET + +// func getisar1() uint64 +TEXT ·getisar1(SB),NOSPLIT,$0-8 + // get Instruction Set Attributes 1 into x0 + // mrs x0, ID_AA64ISAR1_EL1 = d5380620 + WORD $0xd5380620 + MOVD R0, ret+0(FP) + RET + +// func getpfr0() uint64 +TEXT ·getpfr0(SB),NOSPLIT,$0-8 + // get Processor Feature Register 0 into x0 + // mrs x0, ID_AA64PFR0_EL1 = d5380400 + WORD $0xd5380400 + MOVD R0, ret+0(FP) + RET |